gem5+rtl: A Framework to Enable RTL Models Inside a Full-System Simulator
Guillem López-Paradís. (2021). "gem5+rtl: A Framework to Enable RTL Models Inside a Full-System Simulator" ICPP 21.
Guillem López-Paradís. (2021). "gem5+rtl: A Framework to Enable RTL Models Inside a Full-System Simulator" ICPP 21.
Guillem López-Paradís (2023). "Fast Behavioural RTL Simulation of 10B Transistor SoC Designs with Metro-Mpi" DATE 23.
Guillem López-Paradís (2023). "Characterization of a coherent hardware accelerator framework for SoCs" SAMOS 2023.